Flexible FPGA might be powerfull research tools for any field
Researchers are used to build their own tools to achieve new insights in areas noone has entered before because commercial tool just dont adress the need of researchers, just because the market is too small and too little money is to be made for the manufacturers. This holds true for FPGAs and its programming tools.
Therefore researchers and students of any field (like Cern) might want to adapt the FPGA toolchain to better meet their needs. Something impossible with propriety tools.
Making FPGAs more accessible for research on their programming tools
FPGA researchers can do research on FPGAs tools and add their research result to a complete toolchain and evaluate the result of their work on real hardware with real use cases. Something which happens with
How about automatically generating from design parameters discrete electronic circuits and PCBs by writing Verilog code? done here
Making Architectural Research Easier
Groundbraking computer architectural innovations were done by van Neumann very long ago. Since then Moore law brought an abundant supply of computing power.
It makes sense to tailor the hardware ciruits of the computing device to the problem (like neuronal) itself. Solving a class of problems by simulating a new type of computing cuircuitry on a traditional computer is several 10000 times slower than solving the problem on a von Neumann machine itself.
Even emulating a new architecture on a FPGA is 100 times slower then an implementation as an ASIC.
As implementing an ASIC is prohibitive expensive for a research institution, this leads to the problem that most arhcitectural research is of theoretical nature, as it can not afford to try out on real world data and demonstrate its advantages. Here the “demo or die” .
With making FPGA programming tools freely available with sourcecode, we hope to speed up the innovation in hardware defining languages and verification so that it in the result will become a possible for a researcher to get a chip delivered to his lab for reasonable money implementing his invented compute architecture as an ASIC.