A lot of Verilog projects can be accessed and build via FuseSoC which also supports icoBoard
VHF Verilog SDR receiver written for Cyclone III
FM Radiosender in Verilog written for Cyclone III
H.264 Video encoder in VHDL
Sump2 a FPGA based logic analyzer
Zip CPU, a small CPU for FPGAs
SRAM (already part of icoSoC)
rotary dialer (already part of icoSoC)
SPI (already part of icoSoC)
CAN-Bus (currenlty worked on)
UART (already part of icoSoC)
i2C (currently worked on)
Image Sensor Interface (DCMI Digital Camera Interface, CSI)
Floating Point Unit
data/audio/video stream/image compression/decompression block
high resolution rotary position decoder
Random number generator
LCD Interface (DSI)
resistive touch interface
capacitive touch interface
SSI/BiSS master interface device
multi device time synchronisation
AD converter (different speed and bitdepth)
DA converter (different speed and bitdepth)
HW supported VPN for MCU
LANc (Sony camera remote control)
one wire Battery management
narrow band digital signal filter
narrow band modulator/demodulator (FSK OOK QAM)
It has lots of analog function locks and some additional DSP functions:
Risc-V is a free instruction set for CPUs. Find more info here.
Clifford Wolf did implement MCU class Risc-V core and integrated it into the SoC icoSoC which does run on the icoBoard. So you can use the icoBoard as Risc-V MCU developer kit.
Currently Contiki OS is available as operating system running on iocSoC on the icoBoard.
Others did port NuttX to the Risc-V, but it was not yet tested on icoBoard.
We hope in the future to have available microPython on the icoSoC.
Cool chips are a mix of different functionality for a certain usercase, and they make board design much, much easier.
An example is the ATJ331X with its USB 2.0, MCU, DSP, I2C, SPI, UART, 16 bit AD stereo microphone-in, SPDIF, Flash-controller, ZRAM, BROM, SRAM, DC/DC converter, LiPo charger, 20mW audio out amplifier. A nice video about it you find here
“EDA desperately in need of an Open Source SystemVerilog front-end.”
Open Source KiCad has taken over EDA for me and some of my collaborators. Plaintext save files is the killer feature for me.
Russel from nandland.com:
“First of all, Clifford thanks so much for the great tools. With a brand-new install of Ubuntu, I performed exactly the instructions that you outlined on the Project Icestorm website and I was able to build and program my FPGA dev board (The Nandland Go Board) surprisingly easily! This was easier and less work than the official Lattice programmer for Linux. I got hung up in package dependency hell with the Lattice tools.”
Dirk Hohndel from Intel:
“Linux Kernel development proceeds at an insane and still increasing pace”
Laurent Desseignes, Microcontroller Ecosystem Marketing Manager of STMicroelectronics:
“The Linux community is known to attract creative free-thinkers who are adept at sharing ideas and solving challenges efficiently” Link
Yann LeCun: inventor of convolutional neural networks:
“But perhaps more interesting is the idea that FPGAs are the reconfigurable device that might next on the neural network agenda for processing the larger nets (while GPUs remain the high performance training mechanism). In a very interesting admission, LeCun told The Platform that Google is rumored to be building custom hardware to run its neural networks and that this hardware is said to be based on FPGAs.” Link
The biggest hurdle was getting the WiFi driver to work. The tablet used a Realtek chip and he was able to get a “code drop” driver from the company. The driver included all sorts of generic USB code that was unneeded. Eventually, I cut out all of the excess code—reducing the size of the driver by a factor of 20.
Chung from Microsoft:
The idea is to use FPGAs, field-programmable gate arrays, chips that can be reconfigured to implement any design and that can be very power-efficient. Microsoft began using FPGAs to power parts of its Bing search engine last year.
Using FPGAs does come with drawbacks, for example the work that has to be done to program them to do the work at hand. Link
Xilinx and IMO Altera are buggy as hell. In Altera land I have recently been burned by the Qsys to Eclipse monstrosity. I wish these tools targeted a lower level. Qsys and Eclipse are way too automatic and high level for the ridiculous amount of bugs they seem to have. Sure the ref designs work but add something slightly more complex and it creates HW problems in opaque and frustrating ways. Link
“If you look at Xilinx’s tools, for instance, they look nicely integrated, they look like they do a good job synthesizing/implementing things, and modern FPGAs are *so big* that honestly, what the tools do looks like magic.
But then go and open the FPGA editor, and look at the design carefully – and in a *lot* of cases, the tool is just monumentally stupid for what you’re trying to do: because *there’s no way to tell it* what you’re trying to do. There aren’t any attributes, or constraints, or macros available to pass that information along.
You can actually *still fix this* yourself, by implementing the FPGA directly in the editor as a hard macro, and using that hard macro. But Xilinx’s FPGA editor hasn’t been updated in forever – it’s ungodly buggy, and it takes a ton of time to do even simple things. It can’t even handle the fact that the FPGA has symmetry – so you have to build “left-hand side” macros, and “right-hand side” macros, even though you’re trying to say “use the thing closest to this other thing.” Link
Other compatible hardware modules
The following HW modules can be attached by an interface board: